FIG. 14a–FIG. 14c are diagrams showing typical configurations of a conventional high-speed memory interface.
(1) Point to Point Type
As shown in FIG. 14a, a memory controller 1402 and a memory 1401 (DRAM with a built-in terminator) are connected in a point-to-point configuration. The DRAMs (Dynamic Random Memory) 1401 are mounted on both sides of a module board 1410 with DQ terminal of the DRAM 1401 on the front surface of the board 1410 connected to the DQ terminal of the DRAM 1401 on the back surface via a through hole. The DQ signal is terminated by a termination circuit in DRAM with a built-in terminator 1401 at the end of an interconnection.
Although this configuration allows high speed signal transmission, the place where the memory can be arranged only is limited to one position (that is, at the end of the bus), as a result of which, the problem is that the memory capacity cannot be increased.
(2) Conventional Stubless Type
As shown in FIG. 14b, the memory controller 1402 and the memories (DRAM) 1401 are connected in a stubless configuration via a connector 1404, in which there is no branch on a long line that is a deemed as a distributed constant line with regard to signal transmission.
In the configuration shown in FIG. 14b, the memory expansion is made possible because connectors 1404 are provided on a motherboard 1406. Three slots are provided on the motherboard in FIG. 14b, and the interconnection is terminated by a termination resistor 1405 on the motherboard 1406.
The number of times the signal passes through the connector 1404 is twice as many as the number of slots in the configuration shown in FIG. 14b and thus the signal degradation is increased. Hence, there exists a problem that as more slots are added to increase memory capacity, the degradation of signal waveform is enlarged.
(3) Directly Mounted Stubless Type
As shown in FIG. 14c, the memory controller 1402 is connected to the memories 1401 in a stubless configuration, not via a connector, with the memories 1401 mounted directly on a motherboard 1407.
In the configuration shown in FIG. 14c, the signal is transmitted at a high speed and a high-capacity memory may be installed. The problem is that the memory cannot be increased (memory capacity cannot be changed) because the memories 1401 are mounted directly on the motherboard 1407.